SEMI Releases White Paper on 3D Integration Development Status

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SEMI Releases White Paper on 3D Integration Development Status

Through-Silicon Via (TSV) Technology Must Overcome Barriers For Industry Adoption

SAN JOSE, Calif. – July 7, 2009 – SEMI has announced the release of a white paper on the rapid progress of 3D IC integration technology, including Through Silicon Via (TSV) developments, entitled, 3D Integration: An Industry Progress Report. TSV has been one of the most rapidly developing technologies in the semiconductor industry and promises a fundamental shift for the continued role of Moore’s Law and current multi-chip integration and packaging approaches. The white paper is intended to provide chip makers, equipment and materials suppliers, industry technologists, investors and analysts with a snapshot of the rapidly developing technology and insights on critical barriers that have yet to be overcome.

While current integration schemes such as wire bond and flip chip have been in production for some time, the next-generation of 3D integration proposes to incorporate through-silicon via (TSV) technology as the primary method of interconnect. The drivers for the widespread adoption of TSVs are increased performance, reduced form factor, and cost reduction. Additionally, achieving true heterogeneous integration at the local level will require a high-density TSV solution and development efforts are rapidly occurring by numerous organizations around the world.

“Few technology areas are progressing as rapidly as TSV and few with such widespread impact on consumer and industrial electronics,” said Karl Stuber, senior director of Assembly and Test at SEMI. “While various conferences and industry news reporting have been helpful in covering recent developments, SEMI members believed a white paper summarizing the current TSV industry-wide development progress was important to enable a more effective industry-wide implementation process.”

The white paper details the critical development areas in TSV formation and subsequent stacking processes which include those that address insulator/ barrier/seed, etching/plating, thin wafer handling for permanent and temporary bond/debond process, and pick-and-place stacking. In addition, the paper identifies and explores limitations to market adoption of 3D integration using TSVs, including lack of design tools, thermal management issues, test solutions, and supply chain issues.

The report concludes that the successful achievement of all of these technologies relies on collaboration and participation across the supply chain. The paper calls for more communication and information sharing between the design, test, and manufacturing communities to accelerate the march towards market adoption. To this end, the paper outlines the current industry eco-system, including the variety of consortia, industry standards efforts, collaborations, and joint development projects that have been formed to promote development of 3D integration.

The report was developed by SEMI with the assistance of Francoise Von Trapp, industry analyst, and co-sponsored by AZ Electronics, Brewer Science, Dow Electronic Materials, EV Group, KLA-Tencor, Lam Research, and Suss MicroTec.

Price for the report is $99.00 for SEMI Members and $199 for non members. For more information and to purchase the report, visit

SEMI is the global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. SEMI member companies are the engine of the future, enabling smarter, faster and more economical products that improve our lives. Since 1970, SEMI has been committed to helping members grow more profitably, create new markets and meet common industry challenges. SEMI maintains offices in Austin, Bangalore, Beijing, Brussels, Hsinchu, Moscow, San Jose, Seoul, Shanghai, Singapore, Tokyo, and Washington, D.C. For more information, visit

Association Contact:

Scott Smith
Tel: +1.408.943.7957