Wafer-Size Transition to 450 mm? 5 Misconceptions

Wafer-Size Transition to 450 mm? 5 Misconceptions

It seems that everyone in the industry “knows” that bigger wafers mean better productivity and more profits, and everyone “knows” that wafer size changes happen every 10 years, and everyone “knows” that bigger wafers are at least twice as productive as small wafers. However, many experts in the industry think that what “everyone knows” is not truly reality.

There is an industry-wide curiosity about the reality behind a wafer-size transition to 450 mm wafers. According to the ITRS, this transition should happen in 2012 to keep the industry on Moore’s Law, and a few companies are pushing hard to make this happen.

However, the fundamental assumptions that are driving the push for this transition are overstated. Moreover, limited research and development dollars available to tool and equipment suppliers means that investing R&D capital prudently is essential to survival of many companies in the semiconductor supply chain. A white paper released by SEMI in 2005 shows that semiconductor industry R&D dollars are becoming more constrained as advanced process R&D costs rise.

A transition to 450 mm wafers is an extremely expensive and risky proposition— estimates run to well over $25 billion at the high end. The semiconductor industry simply cannot afford to make such an expensive investment based on future “expectations” without an objective analysis of cost and benefit.

In order to determine the best path forward for the industry, the Equipment Productivity Working Group (EPWG) was formed two-and-a-half years ago as SEMI and ISMI worked to analyze the economic realities of the future of the semiconductor industry. The EPWG has finished its economic analysis, and the results clearly show that the right time for 450 is not now, and perhaps not ever.

But the misconceptions about 450 mm, and indeed any wafer size change, still persist. There are five major misconceptions surrounding a wafer-size transition, and the EPWG’s work has opened these up to examination.

Five Misconceptions

    1. “A 50% wafer size changes occur every 10 years.” The length of time between equivalent 50% wafer size increases has steadily grown in time over the last four decades as the industry has slowed its growth rate, and is now much longer than 10 years. However, even if this myth were true, a cost-benefit analysis should always be performed to determine if the next change truly makes sense.

    2. “Larger die sizes drive us to 450 mm wafers.” While die size has been a driver of wafer size change in the past, industry analysis from Wright Williams and Kelly shows that current die size is stable or decreasing.

    3. “Wafer processing costs drive overall chip cost reduction.” An examination of the cost structure of current devices shows that a 450 mm wafer increase will impact less than 10% of final product cost in a positive way. Moreover, there are serious technical and economic issues for the assembly, packaging and test community that are as-yet unaddressed.

    4. “There is a significant productivity gain provided by increasing wafer size.” The EPWG found, through its cost model analysis, that previous wafer size transitions, in and of themselves, offered little gain. While for some tools there is gain to be found from increased wafer area, many tools that are constrained by how much area they can process per hour show little benefit. Gains from the 300 mm wafer size transition were, in fact, due to several factors that were independent of wafer size. Many of these improvements, such as the use of Front-Opening Unified Pods (FOUPs) and Automated Material Handling Systems (AMHS), among others, now exist and will not help to incrementally increase performance over 300 mm.

    5. “A wafer size disruption is the only way to force industry-wide change.” A realistic assessment shows that a wafer size change is the riskiest way to force change, because it will exacerbate the R&D funding gap, reduce or eliminate technology advancement on 300 mm, increase cycle time (over 50% more), and steer the industry away from the consumer-driven market trends.

A key EPWG conclusion was no surprise— technology advancements are the largest lever we have to continue along Moore’s Law. The semiconductor industry’s history is one of relentless innovation in many areas, but changes in product use and consumption are forcing executives to make difficult decisions about investment choices for the future.

However, the industry is now producing for a predominately consumer-driven market, which means fabs and foundries must quickly respond to rapid changes in consumer demand. This requires agile fabs running smaller lot sizes with high product mixes. In this environment, cycle time is paramount, as lengthy time to volume and time to market will significantly impact companies’ profit opportunities.

The Reality

Programs in 300 mm NGF (Next Generation Fab) will provide a coordinated way to inject improvements into the semiconductor manufacturing process. SEMI is pursuing these through collaborative activities with chipmakers within the Equipment Supplier Group (ESG) and Equipment Productivity Working Group (EPWG).

For more information on the EPWG conclusions and the SEMICON West presentation “The 450 mm Transition: When Will It Make Economic Sense for the Semiconductor Industry Ecosystem?” please visit www.semi.org/____