Intel Shares Vision on Manufacturing Strategy and 450 mm
Robert Bruck, vice president of Intel’s Technology and Manufacturing Group and General Manager, Technology Manufacturing Engineering, gave attendees at the SEMI Strategic Business Conference (SBC) detailed insights on the company’s architecture and manufacturing strategies, including plans for “unprecedented collaboration” with suppliers on the evaluation of a 450 mm wafer transition.
Driving Intel’s business strategies is a firm belief in the continued growth and penetration of personal and mobile computing in new applications and new markets worldwide. Bruck began his presentation with the assertion, “The Internet Runs on Intel Architecture” pointing to the one billion users and 150 million websites currently using Intel technology. Noting that later this year, the number of notebooks will outsell desktops for the first time in history, Bruck sees tremendous growth in the global market for microprocessors. “Only 20% of the world has internet access,” said Bruck. “More cell phones will be sold in Africa this year than India.”
While demand is growing and nearly limitless, average selling prices of computing devices are on a relentless decline, creating the overarching need for continued cost reduction. The overarching driver in cost reduction will be continued scaling. “Moore’s Law is alive and well,” said Bruck who sees a “clear path to 22 nm and even 16 nm.” Intel has extended 193 nm dry lithography to 45 nm and will introduce immersion technology at 32 nm. Bruck sees extending immersion to 22 nm with EUV “a leading option” for 16 nm in 2013.
Intel’s new era in scaling is enabled by technology developments that have taken up to 10 years to commercialize, such as high k metal gate technology, strained silicon (now on its third generation technology), copper and low K dielectrics.
Beyond wafer processing, Bruck sees exciting developments in the backend, acknowledging that innovations in assembly and test may be the most challenging in the industry. Thinner substrates, thinner die and smaller solder balls are critical needs for mobile computing. Bruck also noted the enormous test challenges presented in data management, growing SOC complexity, and shortening test windows.
Facing an audience comprised primarily of equipment suppliers, Bruck presented a determined, but open mind on the question of wafer size transition. He said 450 mm wafers will be a “demand driven issue,” but that Intel plans to support “unprecedented cooperation with suppliers” on the issue. Acknowledging the controversy surrounding a potential transition to manufacturing on larger silicon wafers, Bruck stated that Intel would opt for technology node advancement rather than a wafer size change to meet the capacity demand. However, optimism about continued market expansion leads to his conclusion that 450 mm transition is a "not if, but when" consideration. He referenced the alleged observation by IBM's Thomas Watson in the 1950's about a "world market for maybe five computers" as an indication that the future has always challenged conventional wisdom; and that what seems like an extraordinary undertaking today will be justified by market forces in the future.
Yet, he stated that Intel will implement 450 mm when there is a rational market justification and "will not drive for a solution in search for a problem." He also affirmed that Intel will support unprecedented collaboration to successfully transition to 450mm.
Bruck suggested that there are low cost preparatory activities, such as standards development and other pre-competitive preparations that the industry should now pursue and that, "by 2010 we will better understand how the technology will go."
While industry-wide capital spending is expected to decline in 2008, Bruck asserted that the market leaders will continue to invest and noted that three of the four largest chip makers will maintain or accelerate spending this year.
In outlining Intel’s manufacturing strategies, Bruck focused on four main issues:
- Fewer, larger factories
- Higher equipment reuse
- Better factory utilization
- Focus capex on advanced technology
In discussing equipment reuse and better factory utilization issues, Bruck acknowledged the many opportunities that exist to improve fab productivity that have been loosely grouped under the term, “next generation fab.”
Intel’s 45 nm architecture will enable Intel to extend their current platforms with faster transistors with better performance. The 45 nm ramp is steeper than that with 65 nm with the same learning curve on defect reduction and yield improvement. One-third of all Intel CPUs are currently 45 nm, moving to one-half in the next quarter. With high k, metal gate technology, 45 nm architecture will deliver 10X lower gate insulator leakage, 30% less switching power, 30% higher drive current, and 10% lower source drain leakage.
A critical element in Intel’s future strategy is “supply chain differentiation,” said Bruck. He said that Intel and other market leaders will continue to invest and that suppliers will play a critical role in achieving Moore’s Law gains, manufacturing excellence and sustainable development goals. He shared the audience’s concern with industry consolidation, noting that the fab supply base has been reduced 34% since 1997. In summary, he voiced strong support for industry collaboration, saying “alignment with you (referring to suppliers) is critical.”