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In This Issue for June 2010
An Update on 450mm Activities in SEMI Standards
3D ICs and TSVs
First SEMI Thin Film Photovoltaic Standard Published
PV Vibration Task Force Formed
HB-LED Pre-Standards Sessions at SEMICON West
SEMI Standards Events, Workshops, Meetings at SEMICON West
New SEMI PV Automation Standards Committee Formed
PV Standards Workshop at SOLARCON India
International Standards Committee Approves Updates to Regulations Governing SEMI Standards Committees
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 From the Director's Desk
James Amano
3D ICs and TSVs
Three-dimensional integrated circuits (3D ICs) - composed of a stack of two-dimensional die - are increasingly cited as being part of the solution to the semiconductor industry keeping pace with Moore's Law. While current integration schemes such as wire bond and flip chip have been in production for some time, the next generation of 3D integration incorporates through-silicon via (TSV) technology as the primary method of interconnect between the die. TSVs have been one of the most rapidly developing technologies in the semiconductor industry and promise a fundamental shift for current multi-chip integration and packaging approaches. Without manufacturing standards, however, cost-effective, high-volume manufacturing will be difficult to achieve. As Ms. Urmi Ray of Qualcomm's Advanced Technology & Integration Group states, "A key to the success, cost-effectiveness and early adoption of 3D TSV technology is development of technical standards."
3D ICs have the potential for increased performance, smaller footprints, and reduced cost and power consumption. However, multiple manufacturing challenges must first be solved, as 3D ICs' increased design and mechanical complexity can lead to signal interference, increased manufacturing defects, and thermal management issues. In order to gather industry input and identify potential standardization topics,
SEMI and SEMATECH will be hosting a 3D Interconnect Challenges and Need for Standards Workshop
during SEMICON West. This workshop will report recent progress, identify areas of concern for 3D TSV integration, and identify the gaps between existing technologies and future solutions. Participants will also share their experiences dealing with TSV-connected die and wafers.
More...
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